IX Международная студенческая научная конференция Студенческий научный форум - 2017

ПРИМЕНЕНИЕ АВТОМАТИЗИРОВАННОГО МОДЕЛИРОВАНИЯ ПРИ РАЗРАБОТКЕ РЕЖУЩИХ ИНСТРУМЕНТОВ

Калиновская Е.В.

Владимирский государственный университет им. А.Г. и Н.Г. Столетовых

Владимир, Россия

APPLICATION OF CHIP FORMATION SIMULATION TO DEVELOPMENT OF CUTTING TOOLS

Kalinovskaya E.V.

Vladimir state university named after Alexander and Nikolai Stoletovs

Vladimir, Russia

1. Introduction

Cutting is a machining technique with a long history. Although its use in the industrial sector advanced early, efforts to theorize cutting emerged lately in the 20th century. Of such efforts, simulations of chip formation processes began as a means of formulating cutting theories or understanding the phenomena involved in cutting. As such, for some time after its Emergence, simulation remained confined to use only for academic purposes. However, the industrial sector's expectations gradually rose for the application of simulation to practical cutting, as in the cases of other machining techniques. In recent years, realistic and practical simulation techniques have been developed and increasingly used in cutting condition setting and tool development. Sumitomo Electric Industries, Ltd. began to look at this matter in the 1990s and has used chip formation simulations to develop cutting tools since 2000.

Depending on simulation techniques and developments, chip formation simulations can be classified into four groups: 1) Pushing analysis, 2) Steady-state analysis, 3) Transition process analysis, 4) Threedimensional analysis.

Pushing analysis determines the extent of the plastic region and the pressure distribution on the tool surface, rendering a rigid-body displacement to a shape that represents how the chip flows, up to the point of time when a steady state is reached. Using this technique, it is possible to roughly explain the mechanical state of the regions close to the cutting edge. However, concerning accuracy, pushing analysis is inadequate, with the results largely depending on the initial model.

For steady-state analysis, several methods are used. One representative method, developed by Shirakashi et al. and known as the iterative convergence method, repeats elasticplastic calculation and corrections in shearing angle and other settings. This method is only applicable to steadystate cutting processes.

2. Development Process of Chip Formation

Simulation

2.1. Development of simulation models

Theorization of phenomena involved in chip formation observed in cutting advanced on the basis of shear angle theory. However, it was still difficult for analytical techniques to produce solutions with adequate accuracy, because chip formation is a phenomenon in which the work material deforms at a high rate under hightemperature and high-pressure conditions, involving many nonlinear phenomena. As a solution to this difficulty, in around 1970, numerical analysis techniques including the finite element method (FEM)*1 began to be applied to chip formation processes, because such techniques enable determination of numerical solutions even for nonlinear phenomena and are also beneficial in terms of theorization.

In the middle of the 1980s, owing to the evolution of computers, it became possible to conduct transition process analyses of states spanning the initial cutting stage to the steady-state stage. Strenkowski et al. conducted FEM analysis of a workpiece, as an elastic-perfectly plastic solid, and a tool, as an elastic solid, from the initial state to steady-state cutting to describe chip curl formation. Thereafter, in general, this transition process analysis became prevalent in research efforts, which was then followed by more realistic threedimensional analyses. In the late 1990s, commercial software tailored to chip formation simulation appeared on the market, the use of which gradually spread in the industrial sector. Incidentally, aside from FEM simulations, analyses using the molecular dynamics method have also been conducted, assuming ultra-fine atomic-level machining.

2.2. Sumitomo Electric's approach

Sumitomo Electric began to work on developing chip formation simulation in the 1990s. Conducting a joint industry/academia research project, the company developed a practical simulation technique around 2000. Using these Sumitomo Electric's proprietary techniques and introducing the aforementioned commercial software AdvantEdge designed specifically for chip formation simulation, which comes with a database of more than 100 workpiece types, we provide technical support, termed by Sumitomo Electric “tool engineering services,” encompassing tool and machining condition selection for customers, as well as tool geometry development.

3. Usage of and Points to Note about Chip

Formation Simulation

3.1. Benefits and usage of chip formation simulation

Using workpiece and tool geometries and material properties along with cutting conditions as input information the chip formation simulation analyzes elastoplastic deformation and thermal conduction by means of numerical calculations, including FEM, and outputs information such as cutting resistance, chip geometry, and temperature and stress distribution. In contrast to physical cutting, chip formation simulation is, as with other numerical calculation-based simulations on the whole, advantageous in that desired changes can be made in cutting conditions and material properties and experimentally difficult-to-obtain information can be obtained with relative ease. Advantage implies the computational potential of introducing physically impossible cutting conditions, e.g. cutting involving no friction. Advantage includes the potential of obtaining difficult-to-experimentally-measure or troublesome- to-obtain information such as stress and strain with relative ease. Moreover, Advantage refers to the potential of visualizing drilling and atomic-level machining, in which it is not possible to experimentally observe chip formation. These advantages are greatly beneficial in terms of academic research and are also highly useful from the perspective of industrial applications. For tool development, chip formation simulation is primarily intended for use as a technique of evaluating tool design. Apart from that, chip formation simulation is quite beneficial in that, as in the case of using it for academic research purposes, it facilitates understanding of the fundamental mechanisms underlying the phenomena involved in cutting. For example, it is oftenthe case that, after the occurrence of tool chipping, the tool is substantially damaged and what triggered the chipping or in what mechanism the chipping occurred is unclear by observing the tool conditions after cutting. In such cases, simulating similar cutting conditions will enable the user to look at stress values and surmise whether the chipping results from mechanical stress or not, and whether the cause is associated with a transient or steady state of the cutting process. Moreover, chip formation simulation provides educational benefits. Inexperienced engineers may not always be able to conceive phenomena that are comprehensible to experienced engineers. Theoretical and visual descriptions of such phenomena made possible by simulation facilitate understanding.

3.2. Points to note about simulation usage

While chip formation simulations are useful, several points should be noted before use, which are briefly explained below.

1. Agreement between Experiment and Simulation.

The issue of agreement between experimental and simulation results must always be addressed and checked when conducting a simulation. However, close examinations in this regard would be too much to retain the merits of simulation. A realistic and desirable method is to verify simulation results against relatively simple-to-obtain experimental data, such as of chips and cutting resistance, collected only under a few conditions, and, in cases of verified good agreement, to use simulations assuming adequate validity of other indicators of agreement.

2. Relationships between Simulation Results and Required Actual Properties.

Chip formation simulation produces chip geometry, cutting resistance, temperature and stress data. It does not directly deliver data such as chip separation and tool life, though often needed in practical applications. It is therefore necessary to ascertain the relationships between the above data and actual properties desired for evaluation. For example, Ozaki et al. developed a system to predict tool life by combining simulation and a model that describes tool wear.

3. Combination of Chip Formation Simulation and Optimization Tools.

Chip formation simulation is simply a method designed to estimate results under given conditions. To use it to design a tool, a scheme is additionally required to achieve optimization. In this light, taking required calculation time into account, a program that reduces the amount of calculation, such as combining simulation with the design of experiments, is also required.